Low-Power Design of CML Drivers for On-Chip Transmission-Lines
نویسندگان
چکیده
In this paper, we discuss a design technique to reduce the power dissipation of CML buffers for on-chip transmissionlines. CML buffers can operate in higher frequency than conventional static CMOS buffers. On the other hand, the power dissipation is larger than that of the static CMOS buffers. We reduce the power dissipation by using an impedance-unmatched driver. From the pole frequency analysis, our method can decrease the tail current without degrading the throughput of the CML buffer. Experimental results show that our method can reduce the power dissipation by 25%.
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